Clock-Servo Correction Shock Slippage Playbook

2026-03-17 · finance

Clock-Servo Correction Shock Slippage Playbook

Why this exists

Most desks model slippage as market microstructure + strategy behavior. But when clock discipline enters a correction phase (PTP/NTP servo ramps, holdover exit, source-switch), feature age and event ordering can become temporarily biased without obvious hard failures.

That bias silently changes routing urgency, queue confidence, and toxicity estimation.

Result: execution overpays while dashboards still look “within latency SLO.”


Core failure mode

During clock-servo correction shocks:

This is not generic “clock drift.” It is control-loop transition risk.


Slippage decomposition with clock-correction terms

For parent order (i):

[ IS_i = C_{delay} + C_{impact} + C_{miss} + C_{correction-shock} ]

Where:

[ C_{correction-shock} = C_{age-bias} + C_{ordering-bias} + C_{controller-flip} ]


Feature set (production-ready)

1) Clock correction stress features

2) Feature-age integrity features

3) Causality integrity features

4) Execution outcome features


Model architecture

Use a two-layer setup.

  1. Baseline slippage model (existing desk model)
    • impact + fill + markout components
  2. Correction-shock overlay model
    • predicts incremental uplift on mean and q95 slippage:
      • delta_is_mean
      • delta_is_q95

Final forecast:

[ \hat{IS}{final} = \hat{IS}{baseline} + \Delta\hat{IS}_{correction} ]

Train overlay on episodes around servo transitions and source changes; include non-transition controls to avoid confounding with pure volatility spikes.


Regime state machine

State A: CLOCK_STABLE

State B: CLOCK_WATCH

State C: CLOCK_CORRECTION_ACTIVE

State D: SAFE_TIME_INTEGRITY

Use hysteresis and minimum dwell times to avoid state flapping.


Key metrics

Track these by venue + symbol-liquidity bucket.


Rollout plan

Phase 0: Observe-only

Phase 1: Shadow control

Phase 2: Canary

Phase 3: Progressive expansion


Failure drills (must run)

  1. PTP source-switch drill
    • verify transition to CLOCK_WATCH within SLO
  2. Holdover exit drill
    • ensure no controller thrash when offset re-converges
  3. Synthetic resequencing drill
    • verify escalation to SAFE_TIME_INTEGRITY
  4. Rollback drill
    • prove one-command disable of overlay logic

Anti-patterns


Bottom line

When time discipline enters correction dynamics, your execution model can misread reality while still looking healthy at coarse observability layers.

Model clock-servo transition risk as a first-class slippage component, and convert it into explicit state controls before hidden timing debt turns into basis-point loss.